BIOENGINEER

FPGA and ASIC designs accelerate CORDIC with carry-lookahead adders

A hybrid CORDIC architecture using carry-lookahead adders produced accurate sine and cosine outputs on FPGA and ASIC, ...
Electronics Weekly

How to move design algorithms to the FPGA

There are many types of designs being put into FPGAs today, but one type of design stands out – image and signal processing algorithms – because of its significant role in providing product ...
EDN

FPGA algorithm tunes gray, color images

For both gray-scale and color image applications in an FPGA, we have implemented block truncation coding (BTC), a lossy image-compression algorithm with proven value in applications that don't require ...
irblog.prnewswire.com

MicroCloud Hologram Inc. FPGA-Based High-Performance Surface Code Quantum Simulation Platform: Efficient Error Correction Algorithm Validation under Rotated Layout

SHENZHEN, China, Feb. 25, 2026 /PRNewswire/ -- MicroCloud Hologram Inc. (NASDAQ: HOLO), ("HOLO" or the "Company"), a technology service provider, has developed a surface code quantum simulator based ...
EDN

Tool develops FPGA algorithms from C/C++

CoDeveloper FPGA design tool allows algorithms to be developed and debugged with existing C/C++ tools. The tool helps identify dataflow bottlenecks, generates debugging visualizations for ...
Design-Reuse

Altera FPGAs Achieve Compelling Performance-per-Watt in Cloud Data Center Acceleration Using CNN Algorithms

San Jose, Calif., —February 23, 2015—Altera Corporation (NASDAQ: ALTR) today announced Microsoft (NASDAQ: MSFT) is using Altera Arria® 10 FPGAs (field programmable gate arrays), to achieve compelling ...
Electronics Weekly

VMetro FusionXF FPGA development kit for embedded DSP systems

VMetro’s FusionXF FPGA development kit is targeted at reducing the design time and optimizing the performance of complex FPGA and PowerPC processing systems. It aids in the development of their FPGA ...
Business Wire

Impulse and Nallatech Collaborate on C-to-FPGA Design Flow | Business Wire

KIRKLAND, Wash. & BALTIMORE, Md.--(BUSINESS WIRE)--Impulse Accelerated Technologies and Nallatech today announced the release of an Impulse C Platform Support Package allowing the use of the Impulse ...
BIOENGINEER

FPGA-Synchronized EEG Framework Decodes Natural Speech Trial by Trial

A Colombian research team has built an FPGA-synchronized EEG framework that decodes which Spanish vowel a listener hears from ...
Design-Reuse

FPGA algorithm tunes gray, color images

For both gray-scale and color image applications in an FPGA, we have implemented block truncation coding (BTC), a lossy image-compression algorithm with proven value in applications that don't require ...